Flandre, P.: search on Z-Library

The world's largest scientific articles store. 70,000,000+ articles for free.

Don't use scam websites

1

A battery-less BLE smart sensor for room occupancy tracking supplied by 2.45-GHz wireless power transfer

Dekimpe, Rémi, Xu, Pengcheng, Schramme, Maxime, Gérard, Pierre, Flandre, Denis, Bol, David

Journal:

Integration, the VLSI Journal

Year:

2019

Language:

english

File:

PDF, 2.20 MB

english, 2019

2

Wide frequency band assessment of 28nm FDSOI technology platform for analogue and RF applications

Makovejev, S., Kazemi Esfeh, B., Barral, V., Planes, N., Haond, M., Flandre, D., Raskin, J.-P., Kilchytska, V.

Journal:

Solid-State Electronics

Year:

2015

Language:

english

File:

PDF, 1.45 MB

english, 2015

3

Magnetic-field sensor based on a thin-film SOI transistor

Pere Losantos, Carles Cané, Denis Flandre, Jean-Paul Eggermont

Journal:

Sensors and Actuators A: Physical

Year:

1998

Language:

english

File:

PDF, 671 KB

english, 1998

4

A modifiedgm/IDdesign methodology for deeply scaled CMOS technologies

Pollissard-Quatremère, Guillaume, Gosset, Geoffroy, Flandre, Denis

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2014

Language:

english

File:

PDF, 1.55 MB

english, 2014

5

Gate leakage currents model for FinFETs implemented in Verilog-A for electronic circuits design

Garduño, Salvador I., Alvarado, Joaquín, Cerdeira, Antonio, Estrada, Magali, Kilchytska, Valeriya, Flandre, Denis

Journal:

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields

Year:

2014

Language:

english

File:

PDF, 1.89 MB

english, 2014

6

[IEEE ESSDERC 2017 - 47th IEEE European Solid-State Device Research Conference (ESSDERC) - Leuven, Belgium (2017.9.11-2017.9.14)] 2017 47th European Solid-State Device Research Conference (ESSDERC) - Back-gate bias effect on UTBB-FDSOI non-linearity performance

Esfeh, B. Kazemi, Kilchytska, V., Parvais, B., Planes, N., Haond, M., Flandre, D., Raskin, J.-P.

Year:

2017

Language:

english

File:

PDF, 2.18 MB

english, 2017

7

[IEEE 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - Burlingame, CA, USA (2018.10.15-2018.10.18)] 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - 8-T ULV SRAM macro in 28nm FDSOI with 7.4 pW/bit retention power and back-biased-scalable speed/energy trade-off

Haine, Thomas, Flandre, Denis, Bol, David

Year:

2018

File:

PDF, 6 KB

2018

8

A 2.24-pJ/bit 2.5-Gb/s UWB receiver in 28-nm FDSOI CMOS for low-energy chip-to-chip communications

Gimeno, Cecilia, Flandre, Denis, Schramme, Maxime, Frenkel, Charlotte, Bol, David

Journal:

AEU - International Journal of Electronics and Communications

Year:

2020

Language:

english

File:

PDF, 2.29 MB

english, 2020

9

Comparison of self-heating effect in GAA and SOI mosfets

P. Francis, J.P. Colinge, D. Flandre

Journal:

Microelectronics Reliability

Year:

1997

Language:

english

File:

PDF, 721 KB

english, 1997

10

Compact model for single event transients and total dose effects at high temperatures for partially depleted SOI MOSFETs

J. Alvarado, E. Boufouss, V. Kilchytska, D. Flandre

Journal:

Microelectronics Reliability

Year:

2010

Language:

english

File:

PDF, 723 KB

english, 2010

11

New experiments on the electrodeposition of iron in porous silicon

C Renaux, V Scheuren, D Flandre

Journal:

Microelectronics Reliability

Year:

2000

Language:

english

File:

PDF, 240 KB

english, 2000

12

SOI-CMOS compatible low-power gas sensor using sputtered and drop-coated metal-oxide active layers

P. Ivanov, J. Laconte, J. P. Raskin, M. Stankova, E. Sotter, E. Llobet, X. Vilanova, D. Flandre, X. Correig

Journal:

Microsystem Technologies

Year:

2005

Language:

english

File:

PDF, 617 KB

english, 2005

13

Fully integrated blue/UV SOI CMOS photosensor for biomedical and environmental applications

Olivier Bulteel, Aryan Afzalian, Denis Flandre

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2010

Language:

english

File:

PDF, 365 KB

english, 2010

14

Equilibre nutritionnel de l'alimentation de la population adulte résidant

Martine Bernstein, Alfredo Morabia, Michael C. Costanza, J. Richard Landis, Alan Ross, Philippe Flandre, Ba Lau Luong, Shriki Kumanyika, Ann Sorenson, Russel Localio

Journal:

International Journal of Public Health

Year:

1994

File:

PDF, 7.93 MB

1994

15

Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor

Cerdeira, A., Aleman, M.A., Pavanello, M.A., Martino, J.A., Vancaillie, L., Flandre, D.

Journal:

IEEE Transactions on Electron Devices

Year:

2005

Language:

english

File:

PDF, 484 KB

english, 2005

16

Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology

Flandre, D., Viviani, A., Eggermont, J.-P., Gentinne, B., Jespers, P.G.A.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1997

Language:

english

File:

PDF, 260 KB

english, 1997

17

[IEEE 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D) - Tokyo, Japan (2012.05.22-2012.05.23)] 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration - Low temperature assembly method of microfluidic bio-molecules detection device

van Loo, S., Stoukatch, S., Axisa, F., Destine, J., Van Overstraeten-Schlogel, N., Flandre, D., Lefevre, O., Mertens, P.

Year:

2012

Language:

english

File:

PDF, 2.52 MB

english, 2012

18

A Sizing Methodology for On-Chip Switched-Capacitor DC/DC Converters

De Vos, Julien, Flandre, Denis, Bol, David

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2014

Language:

english

File:

PDF, 2.24 MB

english, 2014

19

Diamond layout style impact on SOI MOSFET in high temperature environment

Gimenez, Salvador Pinillos, Galembeck, Egon Henrique Salerno, Renaux, Christian, Flandre, Denis

Journal:

Microelectronics Reliability

Year:

2015

Language:

english

File:

PDF, 659 KB

english, 2015

20

Highly reflective rear surface passivation design for ultra-thin Cu(In,Ga)Se2 solar cells

Vermang, Bart, Wätjen, Jörn Timo, Fjällström, Viktor, Rostvall, Fredrik, Edoff, Marika, Gunnarsson, Rickard, Pilch, Iris, Helmersson, Ulf, Kotipalli, Ratan, Henry, Frederic, Flandre, Denis

Journal:

Thin Solid Films

Year:

2015

Language:

english

File:

PDF, 748 KB

english, 2015

21

Impact of Using the Octagonal Layout for SOI MOSFETs in High Temperature Environment

S. Gimenez, E. Galembeck, C. Renaux, D. Flandre

Year:

2015

Language:

english

File:

PDF, 1.72 MB

english, 2015

22

Large Sample Theory for Schemper's Measures of Explained Variation in the Cox Regression Model

John O'Quigley, Philippe Flandre and Ethan Reiner

Journal:

Journal of the Royal Statistical Society: Series D (The Statistician)

Year:

1999

Language:

english

File:

PDF, 883 KB

english, 1999

23

Quantum Efficiency Improvement of SOI p-i-n Lateral Diodes Operating as UV Detectors at High Temperatures

Novo, Carla, Buhler, Rudolf, Baptista, Joao, Giacomini, Renato, Afzalian, Aryan, Flandre, Denis

Journal:

IEEE Sensors Journal

Year:

2017

Language:

english

File:

PDF, 771 KB

english, 2017

24

Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment

Galembeck, Egon Henrique Salerno, Renaux, Christian, Flandre, Denis, Finco, Saulo, Gimenez, Salvador Pinillos

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2017

Language:

english

File:

PDF, 815 KB

english, 2017

25

Optimisation of rear reflectance in ultra-thin CIGS solar cells towards >20% efficiency

Poncelet, Olivier, Kotipalli, Ratan, Vermang, Bart, Macleod, Angus, Francis, Laurent A., Flandre, Denis

Journal:

Year:

2017

Language:

english

File:

PDF, 1.43 MB

english, 2017

26

Intrinsic rectification in common-gated graphene field-effect transistors

Haddad, Pierre-Antoine, Flandre, Denis, Raskin, Jean-Pierre

Journal:

Year:

2017

Language:

english

File:

PDF, 1.15 MB

english, 2017

27

[IEEE 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Granada, Spain (2018.3.19-2018.3.21)] 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Design benefits of self-cascode configuration for analog applications in 28 FDSOI

d'Oliveira, Ligia, de Souza, Michelly, Kilchytska, Valeriya, Flandre, Denis

Year:

2018

Language:

english

File:

PDF, 406 KB

english, 2018

28

[IEEE 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - Platja d'Aro, Spain (2018.7.2-2018.7.4)] 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - A Battery-Less BLE IoT Motion Detector Supplied by 2.45-GHz Wireless Power Transfer

Dekimpe, Remi, Xu, Pengcheng, Schramme, Maxime, Flandre, Denis, Bol, David

Year:

2018

Language:

english

File:

PDF, 660 KB

english, 2018

29

Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation

Joaquín Alvarado, Benjamin Iñiguez, Magali Estrada, Denis Flandre, Antonio Cerdeira

Journal:

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields

Year:

2010

Language:

english

File:

PDF, 374 KB

english, 2010

30

Subthreshold slope of long-channel, accumulation-mode p-channel SOI MOSFETs

J.P. Colinge, D. Flandre, F. Van de Wiele

Journal:

Solid-State Electronics

Year:

1994

Language:

english

File:

PDF, 404 KB

english, 1994

31

Moderate inversion model of ultrathin double-gate nMOS/SOI transistors

P. Francis, A. Terao, D. Flandre, F. Van de Wiele

Journal:

Solid-State Electronics

Year:

1995

Language:

english

File:

PDF, 548 KB

english, 1995

32

Measurement and modeling of thin-film accumulation-mode SOI p-MOSFET intrinsic gate capacitances

B. Gentinne, D. Flandre, J.-P. Colinge

Journal:

Solid-State Electronics

Year:

1996

Language:

english

File:

PDF, 791 KB

english, 1996

33

Physics and performances of accumulation-mode SOI p-MOSFET's from low (77 K) to high (150–320°C) temperatures

D. Flandre, A. Terao, T. Loo, J.-P. Colinge

Journal:

Microelectronic Engineering

Year:

1992

Language:

english

File:

PDF, 234 KB

english, 1992

34

Effective mobility in FinFET structures with HfO2 and SiON gate dielectrics and TaN gate electrode

T. Rudenko, N. Collaert, S. De Gendt, V. Kilchytska, M. Jurczak, D. Flandre

Journal:

Microelectronic Engineering

Year:

2005

Language:

english

File:

PDF, 156 KB

english, 2005

35

Thin films stress extraction using micromachined structures and wafer curvature measurements

J. Laconte, F. Iker, S. Jorez, N. André, J. Proost, T. Pardoen, D. Flandre, J.-P. Raskin

Journal:

Microelectronic Engineering

Year:

2004

Language:

english

File:

PDF, 369 KB

english, 2004

36

Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer

C. Roda Neve, V. Kilchytska, J. Alvarado, D. Lederer, O. Militaru, D. Flandre, J.-P. Raskin

Journal:

Microelectronics Reliability

Year:

2011

Language:

english

File:

PDF, 733 KB

english, 2011

37

Composite ULP diode fabrication, modelling and applications in multi-Vth FD SOI CMOS technology

David Levacq, Christophe Liber, Vincent Dessard, Denis Flandre

Journal:

Solid-State Electronics

Year:

2004

Language:

english

File:

PDF, 418 KB

english, 2004

38

LDMOS in SOI technology with very-thin silicon film

M. Bawedin, C. Renaux, D. Flandre

Journal:

Solid-State Electronics

Year:

2004

Language:

english

File:

PDF, 561 KB

english, 2004

39

A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation

Michelly de Souza, Marcelo Antonio Pavanello, Benjamín Iñíguez, Denis Flandre

Journal:

Solid-State Electronics

Year:

2005

Language:

english

File:

PDF, 469 KB

english, 2005

40

The low-frequency noise behaviour of graded-channel SOI nMOSFETs

E. Simoen, C. Claeys, T.M. Chung, D. Flandre, M.A. Pavanello, J.A. Martino, J.-P. Raskin

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 271 KB

english, 2007

41

Planar double-gate SOI MOS devices: Fabrication by wafer bonding over pre-patterned cavities and electrical characterization

T.M. Chung, B. Olbrechts, U. Södervall, S. Bengtsson, D. Flandre, J.-P. Raskin

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 1.30 MB

english, 2007

42

Thin film fully-depleted SOI four-gate transistors

K. Akarvardar, S. Cristoloveanu, M. Bawedin, P. Gentil, B.J. Blalock, D. Flandre

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 1.00 MB

english, 2007

43

Compact model for highly-doped double-gate SOI MOSFETs targeting baseband analog applications

Oana Moldovan, Antonio Cerdeira, David Jiménez, Jean-Pierre Raskin, Valeria Kilchytska, Denis Flandre, Nadine Collaert, Benjamin Iñiguez

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 339 KB

english, 2007

44

Electrical characterization of true Silicon-On-Nothing MOSFETs fabricated by Si layer transfer over a pre-etched cavity

V. Kilchytska, T.M. Chung, B. Olbrechts, Ya. Vovk, J.-P. Raskin, D. Flandre

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 265 KB

english, 2007

45

Reduction of gate-to-channel tunneling current in FinFET structures

T. Rudenko, V. Kilchytska, N. Collaert, M. Jurczak, A. Nazarov, D. Flandre

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 292 KB

english, 2007

46

Building ultra-low-power high-temperature digital circuits in standard high-performance SOI technology

David Bol, Julien De Vos, Renaud Ambroise, Denis Flandre, Jean-Didier Legat

Journal:

Solid-State Electronics

Year:

2008

Language:

english

File:

PDF, 340 KB

english, 2008

47

Advantages of graded-channel SOI nMOSFETs for application as source-follower analog buffer

Michelly de Souza, Denis Flandre, Marcelo Antonio Pavanello

Journal:

Solid-State Electronics

Year:

2008

Language:

english

File:

PDF, 293 KB

english, 2008

48

Dynamic body potential variation in FD SOI MOSFETs operated in deep non-equilibrium regime: Model and applications

M. Bawedin, S. Cristoloveanu, D. Flandre, F. Udrea

Journal:

Solid-State Electronics

Year:

2010

Language:

english

File:

PDF, 1.15 MB

english, 2010

49

Experimental study of transconductance and mobility behaviors in ultra-thin SOI MOSFETs with standard and thin buried oxides

T. Rudenko, V. Kilchytska, S. Burignat, J.-P. Raskin, F. Andrieu, O. Faynot, Y. Le Tiec, K. Landry, A. Nazarov, V.S. Lysenko, D. Flandre

Journal:

Solid-State Electronics

Year:

2010

Language:

english

File:

PDF, 915 KB

english, 2010

50

Physics of Gate Modulated Resonant Tunneling (RT)-FETs: Multi-barrier MOSFET for steep slope and high on-current

Aryan Afzalian, Jean-Pierre Colinge, Denis Flandre

Journal:

Solid-State Electronics

Year:

2011

Language:

english

File:

PDF, 885 KB

english, 2011

To build up a library is to create a life. It’s never just a random collection of books.

— Carlos María Domínguez

Official channel

Z-Library Desktop Launcher

Z-Library Since 2009 support@z-lib.do

EnglishРусскийEspañolItalianoελληνικάاللغة العربيةBahasa IndonesiaBahasa Malaysiaहिन्दीDeutschFrançaisPortuguêsУкраїнськаPolski中文繁體中文日本語Tiếng ViệtAzərbaycan DiliՀայոց լեզուภาษาไทยTürk Diliქართველიবাংলাپښتوతెలుగుاردو한국어SrpskiБългарски